PIC16F627-04/SO【PDF 57/170 页】IC MCU FLASH 1KX14 COMP 18SOIC

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2003 Microchip Technology Inc.

Preliminary

DS40300C-page 13

PIC16F62X

3.0

MEMORY ORGANIZATION

3.1

Program Memory Organization

The PIC16F62X has a 13-bit program counter capable

of addressing an 8K x 14 program memory space. Only

the first 1K x 14 (0000h - 03FFh) for the PIC16F627

and 2K x 14 (0000h - 07FFh) for the PIC16F628 are

physically implemented. Accessing a location above

these boundaries will cause a wrap-around within the

first 1K x 14 space (PIC16F627) or 2K x 14 space

(PIC16F628). The RESET vector is at 0000h and the

interrupt vector is at 0004h (Figure 3-1).

FIGURE 3-1:

PROGRAM MEMORY MAP

AND STACK

3.2

Data Memory Organization

The data memory (Figure 3-2) is partitioned into four

banks, which contain the general purpose registers and

the Special Function Registers (SFR). The SFR’s are

located in the first 32 locations of each Bank. Register

locations 20-7Fh, A0h-FFh, 120h-14Fh, 170h-17Fh

and

1F0h-1FFh

are

general

purpose

registers

implemented as static RAM.

The Table below lists how to access the four banks of

registers:

Addresses F0h-FFh, 170h-17Fh and 1F0h-1FFh are

implemented as common RAM and mapped back to

addresses 70h-7Fh.

3.2.1

GENERAL PURPOSE REGISTER

FILE

The register file is organized as 224 x 8 in the

PIC16F62X. Each is accessed either directly or

indirectly through the File Select Register FSR (See

Section 3.4).

PC<12:0>

000h

0004

0005

03FFh

1FFFh

Stack Level 1

Stack Level 8

RESET Vector

Interrupt Vector

On-chip Program

Memory

CALL, RETURN

RETFIE, RETLW

Stack Level 2

07FFh

PIC16F627 and

PIC16F628

PIC16F628 only

On-chip Program

Memory

RP1

RP0

Bank0

Bank1

Bank2

Bank3

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